Engineers in Australia have developed a new building material with about one quarter of concrete’s carbon footprint, while reducing waste going to landfill. The research is published in the journal Structures.

This innovative material, called cardboard-confined rammed earth, is composed entirely of cardboard, water and soil—making it reusable and recyclable.

In Australia alone, more than 2.2 million tons of cardboard and paper are sent to landfill each year. Meanwhile, cement and concrete production account for about 8% of annual global emissions.

Cardboard has previously been used in temporary structures and disaster shelters, such as Shigeru Ban’s iconic Cardboard Cathedral in Christchurch, New Zealand.

Inspired by such designs, the RMIT University team has, for the first time, combined the durability of rammed earth with the versatility of cardboard.

Lead author Dr. Jiaming Ma from RMIT said the development of cardboard-confined rammed earth marked a significant advancement toward a more sustainable construction industry.

“Modern rammed earth construction compacts soil with added cement for strength. Cement use is excessive given the natural thickness of rammed earth walls,” he said.

But cardboard-confined rammed earth, developed at RMIT University, eliminates the need for cement and boasts one quarter of the carbon footprint at under one third of the cost, compared to concrete.

“By simply using cardboard, soil and water, we can make walls robust enough to support low-rise buildings,” Ma said.

“This innovation could revolutionize building design and construction, using locally sourced materials that are easier to recycle.

“It also reflects the global revival of earth-based construction fueled by net zero goals and interest in local sustainable materials.”

Practical benefits

The cardboard-confined rammed earth can be made on the construction site by compacting the soil and water mixture inside the cardboard formwork, either manually or with machines.

Study corresponding author and leading expert in the field of structural optimization, Emeritus Professor Yi Min “Mike’ Xie, said this advancement can spearhead a leaner, greener approach to construction.

“Instead of hauling in tons of bricks, steel and concrete, builders would only need to bring lightweight cardboard, as nearly all material can be obtained on site,” Xie said.

“This would significantly cut transport costs, simplify logistics and reduce upfront material demands.”

Ma said cardboard-confined rammed earth could be an effective solution for construction in remote areas, such as regional Australia, where red soils—ideal for rammed earth construction—are plentiful.

“Rammed earth buildings are ideal in hot climates because their high thermal mass naturally regulates indoor temperatures and humidity, reducing the need for mechanical cooling and cutting carbon emissions,” he said.

The mechanical strength of the novel material varies based on the thickness of the cardboard tubes.

Ma said the team has developed the formula for this strength design.

“We’ve created a way to figure out how the thickness of the cardboard affects the strength of the rammed earth, allowing us to measure strength based on cardboard thickness,” Ma said.

In a separate study led by Ma and published in Composite Structures, carbon fiber was combined with rammed earth, proving it had a comparable strength to high-performance concrete.

Ma and the team are ready to partner with various industries to further develop this new material so it can be used widely.

Probabilistic Ising machines (PIMs) are advanced and specialized computing systems that could tackle computationally hard problems, such as optimization or integer factorization tasks, more efficiently than classical systems. To solve problems, PIMs rely on interacting probabilistic bits (p-bits), networks of interacting units of digital information with values that randomly fluctuate between 0 and 1, but that can be biased to converge to yield desired solutions.

A class of PIMs that are intensively investigated use magnetic devices to inject randomness into a digital transistor-based circuit. While these systems have been found to be promising for the rapid resolution of various domain-specific and advanced problems, their large-scale design and reliable fabrication have so far proved challenging. This is primarily because their upscaling requires the precise control of small magnetic moments and often also entails the use of large circuits that convert digital signals into analog voltages and other additional components.

Researchers at Northwestern University and other institutes recently developed a new application-specific integrated circuit (ASIC) that could be used to create better performing probabilistic computers. In a paper published in Nature Electronics, they presented a probabilistic computer based on the new circuit and showed that it could perform integer factorization tasks.

“We were interested in exploring how one could build a scalable probabilistic computer by custom-designing an ASIC using foundry CMOS technology,” Pedram Khalili Amiri, senior author of the paper, told Tech Xplore.

“Our intuition was that by taking advantage of the digital CMOS platform and the high transistor densities available in today’s semiconductor technology, one could eventually build very large-scale probabilistic computers that can tackle problems related to, for example, combinatorial optimization. As a first step, we decided to try out these ideas, and develop the computing architecture and design approach, using a less advanced (130 nm) foundry node.”

When reviewing previous literature in the field and experimenting with probabilistic computing architectures, Amiri and his colleagues realized that, despite its numerous advantages, CMOS technology does not appear to be well-suited for creating random bit sequences. Notably, the creation of these random sequences is central to the functioning of probabilistic computers.

To overcome this limitation of CMOS technology, the researchers adapted voltage-controlled magnetic tunnel junctions (V-MTJs), hardware components that they introduced in their earlier work and had previously applied to the creation of magnetic random-access memory (MRAM) devices. They changed some elements of these devices so that they would serve as high-throughput and compact sources of randomness (i.e., entropy).

“Our probabilistic computer consists of an array of bistable probabilistic elements (called probabilistic bits or p-bits),” explained Amiri. “The interactions between these p-bits can be programmed so that the p-bit network (called a probabilistic Ising machine or PIM) collectively searches through the solution space of a problem. Our p-bits are implemented using digital CMOS circuitry on our ASIC and use bit sequences read from an adjacent V-MTJ chip to provide the required randomness. The energy minimum of the PIM is designed to correspond to the solution of the computing problem of interest.”

The new probabilistic architecture developed by Amiri and his colleagues could theoretically be used to efficiently tackle many real-world problems, including various optimization tasks. As part of their study, however, the team specifically applied their architecture to integer factorization tasks, which are known to be very challenging to solve computationally.

“This was a good place to start, mainly because there is only one correct solution to be found in the entire energy landscape, and because it is easy to check whether we found the right factors or not,” said Amiri. “The same approach, however, can be applied to many other computing problems.”

Two central advantages of the architecture developed by this research team are that it is digital and synchronous. This is in contrast with most other PIMs introduced in earlier works.

“This means that the probabilistic computer works with a clock that determines a well-defined time interval upon which p-bits can update and does not require area-consuming circuits such as digital-to-analog converters,” said Amiri. “In addition, the use of V-MTJs, which are currently implemented in a separate chip from the ASIC but can eventually be integrated within it, saves area and can provide high-throughput random bit sequences to the p-bits.”

V-MTJs, the components that Amiri and his colleagues used to create their architecture, were found to be inherently more robust against device-to-device variations when used to generate random bits compared to other spintronic random bit generators used in the past. The team’s initial findings were highly promising, highlighting the promise of their approach for creating probabilistic computers.

Notably, although it relies on VMTJs, the new approach is also compatible with established CMOS manufacturing processes and digital design strategies. In the future, it could contribute to the large-scale fabrication of PIMs that could solve a wide range of real-world optimization problems faster and more efficiently.

“Our next step will be to adapt this design to implement problems other than factorization,” added Amiri. “For example, we have a chip in the works that is tailored to other optimization problems with real-world significance. In addition, we plan to integrate the V-MTJs directly on the CMOS in a more advanced foundry node, which would allow us to make the probabilistic computer even more compact.”

© 2025 Science X Network

As part of its overal £11bn investment plan to build “the UK’s best network”, VodafoneThree has appointed Ericsson and Nokia as key partners in the delivery of 5G mobile infrastructure, signing contracts worth more than £2bn.

Three months into operation as a fully merged company, VodafoneThree operates as a multi-brand mobile strategy in the consumer market, with Vodafone, Three, VOXI, Smarty and Talkmobile remaining. Vodafone has a single brand for business customers, offering one team able to tailor systems to a customer’s needs, with the ambition to become the UK’s biggest converged network for business.

VodafoneThree claims to be the only UK operator with a quarter-by-quarter, year-by-year plan to reach 99.95% 5G standalone (5G SA) population coverage by 2034. The 5G SA network build-out plan is front-loaded so that it will hit 90% population coverage from a current baseline of 47% by the end of the third year, and up to 50 million people will have access to its fastest 5G speeds in just one year.

Through the use of the company’s multi-operator core network (MOCN) technology, VodafoneThree said that customers’ devices will automatically connect to the best coverage available, effectively giving them access to two networks at no extra cost. The operator believes this will see customers of both brands experience improved coverage, reliability and speed when using 4G and 5G networks.

The deals with Ericsson and Nokia will span an eight-year period and will see the installation of “the latest technology and R&D” to deliver 5G technology over the course of the forthcoming decade. Nokia and Ericsson will make up the majority of VodafoneThree’s network build which will culminate in a greater number of sites.

The agreement will see Ericsson will deploy its next-generation radio access network (RAN) and core network technology across the UK. In addition to modernising existing 4G and 5G infrastructure, the deployment of Ericsson RAN over 10,000 sites in the UK will look to underpin VodafoneThree’s population-wide rollout of 5G SA connectivity by 2034.

For its part, Nokia will supply equipment from its RAN portfolio to approximately 7,000 sites across the UK. Nokia will also modernise part of VodafoneThree’s voice core to deliver the operator’s premium connectivity to it customers nationwide with improved speeds, coverage, capacity and a smooth transition to 5G Standalone networks.

Four British based site-build partners with extensive experience – Beacon Communication Services Limited, Circet Wireless Limited, M Group Limited and WHP Telecoms Limited – will accompany the technology partners, delivering vital work to enable the build across the UK.

Commenting on the deployments, Max Taylor, CEO, VodafoneThree, said: “We said we would deliver at pace and, just a few months in, we are delighted to announce our strategic partners, Ericsson and Nokia, that will work with us to deliver our ambition of building the UK’s best network. They bring the scale and expertise needed to accelerate the delivery of a resilient, secure, world-class and future-ready network, and together, we are laying the foundations for the UK’s digital future.” 

Ericsson president and CEO Börje Ekholm said: “We are proud to partner with VodafoneThree as their primary vendor to power them with the most advanced programmable network products, software and solutions in the world. Trusted high-performing programmable networks are critical to success for the UK’s digital economy. AI, automation and virtual/augmented reality won’t reach their potential without them.”

Nokia president and CEO Justin Hotard added: “Today’s networks need new levels of performance, trust and resilience. We are pleased that VodafoneThree has chosen our industry-leading network solutions to build a future-proof 5G Standalone network across the UK to meet the needs of customers today and as the AI super-cycle accelerates.”